This paper presents the design and characterization of an efficient high-output-power 55 GHz fundamental oscillator. The performance parameters of the oscillator are analysed as a function of the contributors of the tank capacitance, and the design choices in the varactor for phase noise and for tuning range are exemplified. The circuit was implemented in 22 nm FD-SOI CMOS technology and occupies 0.046 mm2 area including the matching network. On-wafer measurement results have demonstrated 6.5 dBm peak output power, 22% peak DC-to-RF efficiency and −98.3 dBc/Hz phase noise at 1 MHz offset frequency, while the core draws 8.3 mW power. To the best knowledge of the authors, the efficiency is the best, while the output power is the second best among CMOS oscillators in the same frequency range, and the phase noise is the best result for V-band fundamental CMOS oscillators reported to date.

中文翻译：

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具有同步相位噪声和调谐范围优化的高效 6.5 dBm 55 GHz CMOS VCO

本文介绍了高效高输出功率 55 GHz 基本振荡器的设计和表征。振荡器的性能参数被分析为储能电容贡献者的函数，并举例说明了变容二极管中相位噪声和调谐范围的设计选择。该电路采用 22 nm FD-SOI CMOS 技术实现，占地 0.046 mm2包括匹配网络的区域。晶圆上测量结果表明，在 1 MHz 偏移频率下，峰值输出功率为 6.5 dBm，峰值 DC-RF 效率为 22%，相位噪声为 -98.3 dBc/Hz，而内核消耗的功率为 8.3 mW。据作者所知，效率是最好的，而输出功率在相同频率范围内的 CMOS 振荡器中是第二好的，而相位噪声是迄今为止报道的 V 波段基波 CMOS 振荡器中最好的结果。