This paper investigates the impact of thermal stability relaxation in double-barrier magnetic tunnel junctions (DMTJs) for energy-efficient spin-transfer torque magnetic random access memories (STT-MRAMs) operating at the liquid nitrogen boiling point (77 K). Our study is carried out through a macrospin-based Verilog-A compact model of DMTJ, along with a 65 nm commercial process design kit (PDK) calibrated down to 77 K under silicon measurements. Comprehensive bitcell-level electrical characterization is used to estimate the energy/latency per operation and leakage power at the memory architecture-level. As a main result of our analysis, we show that energy-efficient small-to-large embedded memories can be obtained by significantly relaxing the non-volatility requirement of DMTJ devices at room temperature (i.e., by reducing the cross-section area), while maintaining the typical 10-years retention time at cryogenic temperatures. This makes DMTJ-based STT-MRAM operating at 77 K more energy-efficient than six-transistors static random-access memory (6T-SRAM) under both read and write accesses (−56% and −37% on average, respectively). Obtained results thus prove that DMTJ-based STT-MRAM with relaxed retention time is a promising alternative for the realization of reliable and energy-efficient embedded memories operating at cryogenic temperatures.

本文研究了双势垒磁性隧道结 (DMTJ) 中热稳定性弛豫对在液氮沸点 (77 K) 下运行的高能效自旋转移矩磁性随机存取存储器 (STT-MRAM) 的影响。我们的研究是通过基于宏自旋的 Verilog-A 紧凑型 DMTJ 模型以及在硅测量下校准到 77 K 的 65 nm 商业工艺设计套件 (PDK) 进行的。全面的位单元级电气特性用于估计每次操作的能量/延迟和内存架构级的泄漏功率。作为我们分析的主要结果，我们表明，通过显着放宽 DMTJ 器件在室温下的非易失性要求（即，通过减小横截面积），同时在低温下保持典型的 10 年保留时间。这使得基于 DMTJ 的 STT-MRAM 在读取和写入访问（分别平均分别为 -56% 和 -37%）下比六晶体管静态随机存取存储器 (6T-SRAM) 的能效更高，为 77 K。因此，获得的结果证明，具有宽松保留时间的基于 DMTJ 的 STT-MRAM 是实现在低温下运行的可靠且节能的嵌入式存储器的有前途的替代方案。