This article presents a low random noise, a low-power, and a high-speed 2-mega pixels (Mp) global-shutter (GS)-type CMOS image sensor (CIS) using an advanced dynamic random access memory (DRAM) technology. GS CIS is one of the alternatives to solve image distortion issues caused by a conventional rolling-shutter (RS) CIS operation, since a 2-D image data can be simultaneously sampled by the in-pixel analog memory. To achieve a high-performance GS CIS, we proposed a novel architecture for digital pixel sensor (DPS) which is a high-speed GS operation CIS with a pixel-wise analog-to-digital converter (ADC) and an in-pixel digital memory. The major technologies of the proposed DPS can be summarized as follows: 1) two large coupling capacitors with mature DRAM technology; 2) extremely narrow pitch Cu-to-Cu (C2C) bond; and 3) finally low-powered ADC with a near sub-threshold operation. A perfect auto-zero operation for ADC is implemented using two DRAM capacitors, and a large number of transistors have to be integrated in the single pixel for realizing pixel-level ADC. Thus, each pixel has two fine-pitch C2C interconnections. This makes it possible to realize wafer-level stacked unit pixel. The proposed DPS with low-power consuming analog circuits has been successfully designed and developed for extremely fast-readout speed of max. 1200 frames per second (fps) and high sensitivity for low-illumination conditions.

中文翻译：

---

具有像素级 ADC 和存储器的 2.45 e-RMS 低随机噪声、598.5 mW 低功耗和 1.2 kfps 高速 2-Mp 全局快门 CMOS 图像传感器

本文介绍了一种采用先进动态随机存取存储器 (DRAM) 技术的低随机噪声、低功耗和高速 2 兆像素 (Mp) 全局快门 (GS) 型 CMOS 图像传感器 (CIS) . GS CIS 是解决由传统滚动快门 (RS) CIS 操作引起的图像失真问题的替代方案之一，因为像素内模拟存储器可以同时对二维图像数据进行采样。为了实现高性能 GS CIS，我们提出了一种用于数字像素传感器 (DPS) 的新型架构，它是一种具有像素级模数转换器 (ADC) 和像素内数字转换器的高速 GS 操作 CIS记忆。提出的 DPS 的主要技术可以概括如下： 1）两个大耦合电容，具有成熟的 DRAM 技术；2）极窄间距Cu-to-Cu（C2C）键；3) 最后是具有接近亚阈值操作的低功耗 ADC。ADC 完美的自动归零操作是使用两个 DRAM 电容器实现的，并且必须在单个像素中集成大量晶体管才能实现像素级 ADC。因此，每个像素都有两个细间距 C2C 互连。这使得实现晶圆级堆叠单元像素成为可能。所提出的具有低功耗模拟电路的 DPS 已成功设计和开发，可实现最大的极快读出速度。每秒 1200 帧 (fps) 和低照度条件下的高灵敏度。每个像素都有两个细间距 C2C 互连。这使得实现晶圆级堆叠单元像素成为可能。所提出的具有低功耗模拟电路的 DPS 已成功设计和开发，可实现最大的极快读出速度。每秒 1200 帧 (fps) 和低照度条件下的高灵敏度。每个像素都有两个细间距 C2C 互连。这使得实现晶圆级堆叠单元像素成为可能。所提出的具有低功耗模拟电路的 DPS 已成功设计和开发，可实现最大的极快读出速度。每秒 1200 帧 (fps) 和低照度条件下的高灵敏度。