The hardware realization of Universal Filtered Multi Carrier (UFMC) architecture has attracted significant attention in fifth generation (5G) and beyond. In addition to the flexibility in fast Fourier transform (FFT)-length, a flexible prototype filter in combination with multiplicative complex spectrum shifting co-efficients is required for realizing flexible UFMC architecture. The existing architectures of UFMC transmitter commonly adopted fixed-size FFT-length, number of subbands, subband size, and filter-length. Moreover, the lack of flexible prototype filter and spectrum localization of filter co-efficients to individual subbands limits the flexible UFMC system design. In this paper, we propose VLSI architecture for a flexible length prototype filter that can generate spectrally shifted filter co-efficients to individual subbands in tune with the changing value of FFT-length, number of subbands, subband size, and filter-length. For 16-bit word size architecture, our proposed design produces filter co-efficients and spectrum shifting co-efficients upto length, $2^{15}$ . Thus, any desired combination of FFT-length, number of subbands, subband size and filter-length is selected to generate the filter co-efficients for the individual subbands. Moreover, complex multiplication and addition operations are reduced in proposed architecture, quantitatively, about 58.81% reduction in filtering unit is achieved over the state-of-the-art architecture. Finally, hardware implementation output and XILINX post route simulation result matches perfectly with MATLAB simulations.

中文翻译：

---

用于 5G 中低复杂度灵活 UFMC 的联合滤波器和频谱移动架构

通用滤波多载波 (UFMC) 架构的硬件实现在第五代 (5G) 及以后引起了极大的关注。除了快速傅里叶变换 (FFT) 长度的灵活性外，还需要一个灵活的原型滤波器与乘法复频谱偏移系数相结合，以实现灵活的 UFMC 架构。现有的UFMC发射机架构普遍采用固定大小的FFT长度、子带数量、子带大小和滤波器长度。此外，缺乏灵活的原型滤波器和滤波器系数对各个子带的频谱定位限制了灵活的 UFMC 系统设计。在本文中，我们为灵活长度原型滤波器提出了 VLSI 架构，该架构可以根据 FFT 长度、子带数量、子带大小和滤波器长度的变化值，为各个子带生成谱移滤波器系数。对于 16 位字长的架构，我们提出的设计产生滤波器系数和频谱移位系数达到长度， $2^{15}$ . 因此，选择FFT长度、子带数量、子带大小和滤波器长度的任何期望组合来生成各个子带的滤波器系数。此外，在所提出的架构中减少了复杂的乘法和加法运算，定量地，与最先进的架构相比，滤波单元减少了约 58.81%。最后，硬件实现输出和 XILINX 布线后仿真结果与 MATLAB 仿真完美匹配。