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A monolithic InP/SOI platform for integrated photonics
Light: Science & Applications ( IF 19.4 ) Pub Date : 2021-09-26 , DOI: 10.1038/s41377-021-00636-0
Zhao Yan 1 , Yu Han 1 , Liying Lin 1 , Ying Xue 1 , Chao Ma 2 , Wai Kit Ng 2 , Kam Sing Wong 2 , Kei May Lau 1
Affiliation  

The deployment of photonic integrated circuits (PICs) necessitates an integration platform that is scalable, high-throughput, cost-effective, and power-efficient. Here we present a monolithic InP on SOI platform to synergize the advantages of two mainstream photonic integration platforms: Si photonics and InP photonics. This monolithic InP/SOI platform is realized through the selective growth of both InP sub-micron wires and large dimension InP membranes on industry-standard (001)-oriented silicon-on-insulator (SOI) wafers. The epitaxial InP is in-plane, dislocation-free, site-controlled, intimately positioned with the Si device layer, and placed right on top of the buried oxide layer to form “InP-on-insulator”. These attributes allow for the realization of various photonic functionalities using the epitaxial InP, with efficient light interfacing between the III–V devices and the Si-based waveguides. We exemplify the potential of this InP/SOI platform for integrated photonics through the demonstration of lasers with different cavity designs including subwavelength wires, square cavities, and micro-disks. Our results here mark a critical step forward towards fully-integrated Si-based PICs.



中文翻译:

用于集成光子学的单片 InP/SOI 平台

光子集成电路 (PIC) 的部署需要一个可扩展、高吞吐量、经济高效且节能的集成平台。在这里,我们展示了 SOI 平台上的单片 InP,以协同两个主流光子集成平台的优势:Si 光子学和 InP 光子学。这种单片 InP/SOI 平台是通过在工业标准 (001) 取向的绝缘体上硅 (SOI) 晶片上选择性生长 InP 亚微米线和大尺寸 InP 膜来实现的。外延 InP 在面内、无位错、位点控制、与 Si 器件层紧密定位,并放置在掩埋氧化物层的正上方以形成“InP-on-insulator”。这些属性允许使用外延 InP 实现各种光子功能,在 III-V 族器件和 Si 基波导之间具有高效的光接口。我们通过演示具有不同腔体设计(包括亚波长线、方形腔体和微盘)的激光器,证明了这种 InP/SOI 平台在集成光子学方面的潜力。我们的结果标志着朝着完全集成的基于硅的 PIC 迈出的关键一步。

更新日期:2021-09-28
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