Abstract

In the paper the high-speed architecture of built-in self test (BIST) for double data rate synchronous dynamic random access memory (DDR SDRAM) is proposed. The BIST proposed can make self testing at its operating frequency that improves the reliability of the results obtained.

中文翻译：

---

用于航天器控制系统的 DDR 存储器设备自测工具的体系结构

摘要

本文提出了双倍数据速率同步动态随机存取存储器（DDR SDRAM）的内置自检（BIST）高速架构。所提出的 BIST 可以在其工作频率下进行自检，从而提高了所获得结果的可靠性。