Digital accelerators in the latest generation of CMOS processes support multiply and accumulate (MAC) operations at energy efficiencies spanning 10-to-100~fJ/Op. But the operating speed for such MAC operations are often limited to a few hundreds of MHz. Optical or optoelectronic MAC operations on today's SOI-based silicon photonic integrated circuit platforms can be realized at a speed of tens of GHz, leading to much lower latency and higher throughput. In this paper, we study the energy efficiency of integrated silicon photonic MAC circuits based on Mach-Zehnder modulators and microring resonators. We describe the bounds on energy efficiency and scaling limits for N x N optical networks with today's technology, based on the optical and electrical link budget. We also describe research directions that can overcome the current limitations. The next generation of silicon photonics, which we term Silicon Photonics 2.0, promises many exciting opportunities to enable the next frontier in optical computing and communication.

中文翻译：

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扩大基于硅光子的加速器：挑战和机遇，以及 SiliconPhotonics 2.0 的路线图

最新一代 CMOS 工艺中的数字加速器支持乘法和累加 (MAC) 操作，能效范围为 10 到 100~fJ/Op。但此类 MAC 操作的操作速度通常限于数百 MHz。当今基于 SOI 的硅光子集成电路平台上的光学或光电 MAC 操作可以以数十 GHz 的速度实现，从而大大降低延迟和提高吞吐量。在本文中，我们研究了基于 Mach-Zehnder 调制器和微环谐振器的集成硅光子 MAC 电路的能效。我们根据光和电链路预算，描述了采用当今技术的 N x N 光网络的能效界限和缩放限制。我们还描述了可以克服当前限制的研究方向。