The Hamiltonian size reduction method or the mode space method applicable to general heterogeneous structures is developed in this work. The effectiveness and accuracy of the method are demonstrated for four example devices, such as GaSb/InAs tunnel field effect transistors (FETs), MoTe${}_2$/SnS${}_2$ bilayer vertical FETs, InAs nanowire FETs with a defect, and Si nanowire FETs with rough surfaces. The Hamiltonian size is reduced to around 5% of the original full-Hamiltonian size without losing the accuracy of the calculated transmission and local density of states in a practical sense. The method developed in this work can be used with any type of Hamiltonian and can be applied virtually to any hetero-structure, and so it has the potential to become an enabling technology for efficient simulations of hetero-structures.

中文翻译：

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用于高效器件仿真的异质结构模式空间方法

在这项工作中开发了适用于一般异质结构的哈密顿尺寸缩减方法或模式空间方法。该方法的有效性和准确性在四个示例器件中得到了证明，例如 GaSb/InAs 隧道场效应晶体管 (FET)、MoTe${}_2$/SnS${}_2$双层垂直 FET、具有缺陷的 InAs 纳米线 FET 和具有粗糙表面的 Si 纳米线 FET。哈密​​顿量减少到原始全哈密顿量的 5% 左右，而不会失去实际意义上的计算传输和局部状态密度的准确性。这项工作中开发的方法可以与任何类型的哈密顿量一起使用，并且几乎可以应用于任何异质结构，因此它有可能成为有效模拟异质结构的使能技术。