当前位置: X-MOL 学术arXiv.cs.AR › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
AutoSoC: Automating Algorithm-SOC Co-design for Aerial Robots
arXiv - CS - Hardware Architecture Pub Date : 2021-09-13 , DOI: arxiv-2109.05683
Srivatsan Krishnan, Thierry Tambe, Zishen Wan, Vijay Janapa Reddi

Aerial autonomous machines (Drones) has a plethora of promising applications and use cases. While the popularity of these autonomous machines continues to grow, there are many challenges, such as endurance and agility, that could hinder the practical deployment of these machines. The closed-loop control frequency must be high to achieve high agility. However, given the resource-constrained nature of the aerial robot, achieving high control loop frequency is hugely challenging and requires careful co-design of algorithm and onboard computer. Such an effort requires infrastructures that bridge various domains, namely robotics, machine learning, and system architecture design. To that end, we present AutoSoC, a framework for co-designing algorithms as well as hardware accelerator systems for end-to-end learning-based aerial autonomous machines. We demonstrate the efficacy of the framework by training an obstacle avoidance algorithm for aerial robots to navigate in a densely cluttered environment. For the best performing algorithm, our framework generates various accelerator design candidates with varying performance, area, and power consumption. The framework also runs the ASIC flow of place and route and generates a layout of the floor-planed accelerator, which can be used to tape-out the final hardware chip.

中文翻译:

AutoSoC:用于空中机器人的自动化算法-SOC 协同设计

空中自主机器(无人机)有大量有前途的应用和用例。虽然这些自主机器的受欢迎程度不断提高,但仍有许多挑战,例如耐力和敏捷性,可能会阻碍这些机器的实际部署。闭环控制频率必须很高才能实现高敏捷性。然而,考虑到空中机器人资源受限的特性,实现高控制回路频率具有巨大的挑战性,需要对算法和机载计算机进行仔细的协同设计。这种努力需要连接各种领域的基础设施,即机器人技术、机器学习和系统架构设计。为此,我们提出了 AutoSoC,这是一个用于协同设计算法的框架以及基于端到端学习的空中自主机器的硬件加速器系统。我们通过训练空中机器人在密集杂乱环境中导航的避障算法来证明该框架的有效性。为了获得最佳性能的算法,我们的框架会生成具有不同性能、面积和功耗的各种加速器设计候选。该框架还运行布局和布线的 ASIC 流程,并生成平面加速器的布局,可用于流片最终硬件芯片。
更新日期:2021-09-14
down
wechat
bug