One major challenge to scaling quantum dot qubits is the dense wiring requirements, making it difficult to envision fabricating large 2D arrays of nearest-neighbor-coupled qubits necessary for error correction. We describe a method to ameliorate this issue by spacing out the qubits using superconducting resonators facilitated by 3D integration. To prove the viability of this approach, we use integration to couple an off-chip high-impedance TiN resonator to a double quantum dot in a Si/SiGe heterostructure. Using the resonator as a dispersive gate sensor, we tune the device down to the single electron regime with an SNR = 5.36. Characterizing the individual systems shows 3D integration can be done while maintaining low-charge noise for the quantum dots and high-quality factors for the superconducting resonator (single photon Q_L = 2.14 × 10⁴ with Q_i ≈ 3 × 10⁵), necessary for readout and high-fidelity two-qubit gates.

缩放量子点量子位的一个主要挑战是密集的布线要求，这使得很难想象制造纠错所需的最近邻耦合量子位的大型二维阵列。我们描述了一种通过使用 3D 集成促进的超导谐振器分隔量子位来改善此问题的方法。为了证明这种方法的可行性，我们使用集成将片外高阻抗 TiN 谐振器耦合到 Si/SiGe 异质结构中的双量子点。使用谐振器作为色散门传感器，我们将器件调低到单电子状态，SNR = 5.36。表征单个系统表明可以进行 3D 集成，同时保持量子点的低电荷噪声和超导谐振器（单光子Q _L  = 2.14 × 10 ⁴且Q _i  ≈ 3 × 10 ⁵ )，这是读出和高保真双量子位门所必需的。