Phase-change memory (PCM) as emerging non-volatile memory has attracted more attention and considered as the promising replacement of the main memory. PCM has shown good scalability and high storage density, but data storage reliability has become a challenge and concern. When data are written into PCM cells by a phase transition between amorphous and crystalline, the resistance of each state drifts as the increase of storage time due to structural relaxation. As a result, raw bit error rates (RBER) become higher and higher, severely degrading the data storage reliability (i.e., an important problem in PCM). In this paper, we first find that high error percentage exists between the full amorphous and amorphous states in multilevel cell (MLC) PCM via a preliminary experiment, which is the main factor leading to high RBER. Then, we analyze why this phenomenon exists in PCM from the view of the resistance drift. Finally, by exploiting the resistance drift characteristics, we propose drift compensation and drift-aware LDPC decoding schemes to improve reliability of PCM. Simulation results show that the proposed schemes can significantly reduce the RBER and LDPC decoding iterations.

中文翻译：

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利用电阻漂移特性提高LDPC辅助相变存储器的可靠性

相变存储器（PCM）作为新兴的非易失性存储器引起了更多的关注，被认为是主存储器的有前途的替代品。PCM 已经表现出良好的可扩展性和高存储密度，但数据存储可靠性已成为一个挑战和关注点。当数据通过非晶态和晶态之间的相变写入 PCM 单元时，由于结构松弛，每个状态的电阻随着存储时间的增加而漂移。结果，原始误码率（RBER）变得越来越高，严重降低了数据存储的可靠性（即PCM中的一个重要问题）。在本文中，我们首先通过初步实验发现多级单元 (MLC) PCM 中完全非晶态和非晶态之间存在高误差百分比，这是导致高 RBER 的主要因素。然后，我们从电阻漂移的角度分析为什么PCM中存在这种现象。最后，通过利用电阻漂移特性，我们提出了漂移补偿和漂移感知 LDPC 解码方案，以提高 PCM 的可靠性。仿真结果表明，所提出的方案可以显着减少 RBER 和 LDPC 解码迭代。