This work reports the architecture, design, verification and prototyping of a 100 Gbit/s AES-GCM cryptography engine specifically conceived for securing optical transport network (OTN) systems. The proposed solution addresses the main systemic issues related to the use of a block cipher in an OTN system, such as the need for data packetization, the transport of cryptographic auxiliary information, the hitless cipher key change mechanism, and others. The implemented functional logic block (IP core) interfaces with other OTN processing blocks with a 640-bit data path running at 180 MHz. The design was successfully verified by simulations based on regular test benches and the encryption algorithm was validated against standardized test vectors. The full engine was integrated into an 8-million gate 40 nm OTN Processor ASSP developed by CPQD for the Brazilian telecom industry. Chip and ASSP design metrics are also presented. The overall concept and design ideas can contribute to other works related to both OTN and cryptography technology.

这项工作报告了专为保护光传输网络 (OTN) 系统而设计的 100 Gbit/s AES-GCM 加密引擎的架构、设计、验证和原型设计。提议的解决方案解决了与在 OTN 系统中使用分组密码相关的主要系统问题，例如数据分组的需要、加密辅助信息的传输、无中断密钥更改机制等。实施的功能逻辑块（IP 核）与其他 OTN 处理块连接，具有 180 MHz 运行的 640 位数据路径。通过基于常规测试平台的模拟成功验证了该设计，并针对标准化测试向量验证了加密算法。完整的引擎被集成到 CPQD 为巴西电信行业开发的 800 万门 40 纳米 OTN 处理器 ASSP 中。还介绍了芯片和 ASSP 设计指标。整体概念和设计思路可以为其他与 OTN 和密码技术相关的工作做出贡献。