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Investigation of 4H-SiC gate-all-around cylindrical nanowire junctionless MOSFET including negative capacitance and quantum confinements
The European Physical Journal Plus ( IF 3.4 ) Pub Date : 2021-07-29 , DOI: 10.1140/epjp/s13360-021-01787-0
Dariush Madadi 1 , Ali Asghar Orouji 1
Affiliation  

In our work, we demonstrate a 4H-SiC gate-all-around cylindrical nanowire junctionless (GAA-NWJL) metal oxide field effect transistor (MOSFET) with a negative capacitance (NC) in 20 nm gate length. This paper obtains a subthreshold swing (SS) lower than 60 mV/decade, which is the critical point in conventional MOSFETs. Also, a low drain-induced barrier lowering (DIBL) has been achieved at 21 mV/V. A high Ion/Ioff ratio ~ 4 × 1013 and shallow leakage current ~ 8 × 10–19 A are shown. We investigate the influence of the channel length, doping concentration, gate dielectric, and nanowire diameter on the device characteristics and short-channel effects of the GAA-NWJL. Besides, subthreshold slope, DIBL, leakage current, Ion/Ioff ratio, and band-to-band tunneling (BTBT) results have been analyzed. Lead zirconate titanate (PZT), as a ferroelectric material with negative capacitance (NC), is used at the top of the oxide region to obtain an ideal subthreshold swing at sub 60 mV/decade. Because of working in the sub-10 nm, quantum confinement impacts are considered. Furthermore, the 1D Landau–Khalatnikov (L–K) equations are considered in the structure simulations.



中文翻译:

包括负电容和量子限制的 4H-SiC 环栅圆柱形纳米线无结 MOSFET 的研究

在我们的工作中,我们展示了具有负电容 (NC) 的 4H-SiC 无栅圆柱纳米线 (GAA-NWJL) 金属氧化物场效应晶体管 (MOSFET),栅极长度为 20 nm。本文获得了低于 60 mV/decade 的亚阈值摆幅 (SS),这是传统 MOSFET 的临界点。此外,已在 21 mV/V 下实现了低漏电势垒降低 (DIBL)。显示了高 I on /I off比 ~ 4 × 10 13和浅漏电流 ~ 8 × 10 –19 A。我们研究了沟道长度、掺杂浓度、栅极电介质和纳米线直径对 GAA-NWJL 的器件特性和短沟道效应的影响。此外,亚阈值斜率,DIBL,漏电流,I/比,带对带隧穿(BTBT)的结果进行了分析。锆钛酸铅 (PZT) 作为具有负电容 (NC) 的铁电材料,用于氧化物区域的顶部,以获得低于 60 mV/decade 的理想亚阈值摆幅。由于工作在亚 10 纳米,因此考虑了量子限制影响。此外,在结构模拟中考虑了 1D Landau-Khalatnikov (L-K) 方程。

更新日期:2021-07-29
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