Abstract

This paper presents a high efficiency K-band CMOS power amplifier (PA) in GlobalFoundries (GF) 45 nm SOI CMOS technology for 5 G applications. Compared with an ordinary two-stage PA, the PA uses a current-reused technique to enhance the power gain and efficiency within the frequency band. The resistance feedback structure of the power output stage improves the gain flatness and the output bandwidth, and reduces the matching components. The simulation results show that the output power (Pout) is more than 21.6 dBm from 18 to 27 GHz, while the small signal gain (S21) is more than 30.6 dB, the output 1 dB compression point (OP_1dB) is 19.8 dBm and power-added efficiency (PAE) is 36.8%. With a 64-QAM LTE signal with 20-MHz bandwidth, adjacent channel leakage ratio (ACLR) is −31.2 dBc and the error vector amplitude(EVM) is less than − 26.7 dB at an average output power of 10.9 dBm. The chip area with pads is 0.75mm², and consumes 15.1 mW from 2.4 V.

摘要

本文介绍了 GlobalFoundries (GF) 45 nm SOI CMOS 技术中用于 5G 应用的高效 K 波段 CMOS 功率放大器 (PA)。与普通的两级功放相比，功放采用电流复用技术，提高频段内的功率增益和效率。功率输出级的电阻反馈结构提高了增益平坦度和输出带宽，减少了匹配元件。仿真结果表明，18-27GHz输出功率（Pout）大于21.6dBm，而小信号增益（S21）大于30.6dB，输出1dB压缩点（OP _1dB）) 为 19.8 dBm，功率附加效率 (PAE) 为 36.8%。对于带宽为 20MHz 的 64-QAM LTE 信号，邻信道泄漏比 (ACLR) 为 −31.2 dBc，误差矢量幅度 (EVM) 小于 − 26.7 dB，平均输出功率为 10.9 dBm。带焊盘的芯片面积为 0.75mm ²，从 2.4 V 消耗 15.1 mW。