Carbon nanotube field effect transistor (CNFET), using the carbon nanotubes (CNTs) as the material for conducting, is a promising alternative of CMOS technology to overcome the “power wall” issue. Recently, a microprocessor solely based on CNFETs was fabricated and demonstrated, which is a big step forward to the industrial practice. However, CNFETs are inherently subject to much larger process variation or manufacturing defects; thereby it may cause significant design cost to build high performance processors. This is exacerbated in the large register file (RF) architectures widely used in single instruction multiple data (SIMD) architectures, e.g., general public utilities style processors, where the number of critical paths are multiplied by the SIMD width and thread count. In this paper, we seek cost-effective approaches to address the issues by judiciously exploiting the strong asymmetric spatial correlation in the variation unique to the CNFET fabrication process. This paper presents a microarchitectural model to characterize CNFET delay variation and malfunction, under which we show that the RF organizations coupled with the architectural schemes are critical to the performance and power consumption of the SIMD processor. Therefore, we propose several architectural techniques to mitigate the performance degradation and the impact of CNT metallization, leveraging the distinctive CNFET characteristics and the unique features in the SIMD processors. Experimental results verify the effectiveness of the proposed techniques and demonstrate the great opportunity offered by this new device technology.

中文翻译：

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基于 CNFET 的高吞吐量 SIMD 架构

使用碳纳米管 (CNT) 作为导电材料的碳纳米管场效应晶体管 (CNFET) 是克服“功率墙”问题的 CMOS 技术的有前途的替代品。最近，一个完全基于 CNFET 的微处理器被制造和展示，这是向工业实践迈出的一大步。然而，CNFET 固有地受到更大的工艺变化或制造缺陷的影响。因此，构建高性能处理器可能会导致显着的设计成本。这在广泛用于单指令多数据 (SIMD) 体系结构中的大型寄存器文件 (RF) 体系结构中加剧，例如，通用公用事业类型处理器，其中关键路径的数量乘以 SIMD 宽度和线程数。在本文中，我们通过明智地利用 CNFET 制造工艺特有的变化中的强不对称空间相关性来寻求具有成本效益的方法来解决这些问题。本文提出了一个微架构模型来表征 CNFET 延迟变化和故障，在该模型下，我们表明 RF 组织与架构方案相结合对 SIMD 处理器的性能和功耗至关重要。因此，我们提出了几种架构技术来减轻性能下降和 CNT 金属化的影响，利用独特的 CNFET 特性和 SIMD 处理器的独特功能。实验结果验证了所提出技术的有效性，并证明了这种新设备技术提供的巨大机会。