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Design of 3-dB parallel-line coupler using the substrate integrated double-strip coaxial line with performance enhancement
Microwave and Optical Technology Letters ( IF 1.5 ) Pub Date : 2021-07-09 , DOI: 10.1002/mop.32963
Min-Hua Ho, Keh-Yi Lee, Wanchu Hong, Gwan-Wei Su

The contribution of this work is to propose a 3-dB parallel-line coupler design using the novel substrate integrated double-strip coaxial line (SIDSCL). The SIDSCL is composed of three substrates with two signal strips embedded in the center of the SIDSCL tunnel. The proposed coupler's coupled-line section formed by the SIDSCL's two broad-side-faced strips resolves the very difficult-to-achieved 3-dB tight coupling task and possesses an extremely wide operating bandwidth. Its flexible circuit layout diversity allows the through- and coupled-port to be laid either on the same side or on the opposite side. A patch capacitance is attached to each branch-line to compensate for the parasitic inductance and capacitance that are arisen near the branch junction. As a result, the isolation and impedance matching are greatly improved.

中文翻译:

性能增强的基片集成双带同轴线3dB平行线耦合器设计

这项工作的贡献是提出了一种使用新型基板集成双带同轴线 (SIDSCL) 的 3-dB 平行线耦合器设计。SIDSCL 由三个基板组成,两个信号条嵌入 SIDSCL 隧道的中心。拟议的耦合器的耦合线部分由 SIDSCL 的两个宽侧面条带形成,解决了非常难以实现的 3-dB 紧耦合任务,并拥有极宽的工作带宽。其灵活的电路布局多样性允许将直通端口和耦合端口放置在同一侧或相反侧。贴片电容连接到每条支线,以补偿在支线结点附近产生的寄生电感和电容。因此,隔离和阻抗匹配得到了极大的改善。
更新日期:2021-09-01
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