As applications move to the edge, efficiency in computing power and power/energy consumption is required. Heterogeneous computing promises to meet these requirements through application-specific hardware accelerators. Runtime adaptivity might be of paramount importance to realize the potential of hardware specialization, but further study is required on workload retargeting and offloading to reconfigurable hardware. This article presents our framework for the exploration of both offloading and hardware generation techniques. The framework is currently able to process instruction sequences from MicroBlaze, ARMv8, and riscv32imaf binaries, and to represent them as Control and Dataflow Graphs for transformation to implementations of hardware modules. We illustrate the framework’s capabilities for identifying binary sequences for hardware translation with a set of 13 benchmarks.

中文翻译：

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用于自动硬件生成的二进制翻译框架

随着应用程序向边缘移动，计算能力和功率/能源消耗的效率是必需的。异构计算有望通过特定于应用程序的硬件加速器来满足这些要求。运行时适应性可能对实现硬件专业化的潜力至关重要，但需要进一步研究工作负载重定向和卸载到可重新配置的硬件。本文介绍了我们探索卸载和硬件生成技术的框架。该框架目前能够处理来自 MicroBlaze、ARMv8 和 riscv32imaf 二进制文件的指令序列，并将它们表示为控制和数据流图，以转换为硬件模块的实现。