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A Cost-Efficient Digital ESN Architecture on FPGA for OFDM Symbol Detection
ACM Journal on Emerging Technologies in Computing Systems ( IF 2.2 ) Pub Date : 2021-06-30 , DOI: 10.1145/3440017
Victor M. Gan 1 , Yibin Liang 1 , Lianjun Li 1 , Lingjia Liu 1 , Yang Yi 1
Affiliation  

The echo state network (ESN) is a recently developed machine-learning paradigm whose processing capabilities rely on the dynamical behavior of recurrent neural networks. Its performance outperforms traditional recurrent neural networks in nonlinear system identification and temporal information processing applications. We design and implement a cost-efficient ESN architecture on field-programmable gate array (FPGA) that explores the full capacity of digital signal processor blocks on low-cost and low-power FPGA hardware. Specifically, our scalable ESN architecture on FPGA exploits Xilinx DSP48E1 units to cut down the need of configurable logic blocks. The proposed architecture includes a linear combination processor with negligible deployment of configurable logic blocks and a high-accuracy nonlinear function approximator. Our work is verified with the prediction task on the classical NARMA dataset and a symbol detection task for orthogonal frequency division multiplexing systems using a wireless communication testbed built on a software-defined radio platform. Experiments and performance measurement show that the new ESN architecture is capable of processing real-world data efficiently for low-cost and low-power applications.

中文翻译:

用于 OFDM 符号检测的 FPGA 上具有成本效益的数字 ESN 架构

回声状态网络 (ESN) 是最近开发的机器学习范式,其处理能力依赖于循环神经网络的动态行为。它的性能在非线性系统识别和时间信息处理应用中优于传统的递归神经网络。我们在现场可编程门阵列 (FPGA) 上设计并实现了一种经济高效的 ESN 架构,该架构探索了低成本和低功耗 FPGA 硬件上数字信号处理器模块的全部能力。具体来说,我们在 FPGA 上的可扩展 ESN 架构利用 Xilinx DSP48E1 单元来减少对可配置逻辑块的需求。所提出的架构包括一个线性组合处理器,可配置逻辑块的部署可忽略不计,以及一个高精度非线性函数逼近器。我们的工作通过经典 NARMA 数据集的预测任务和正交频分复用系统的符号检测任务得到验证,该任务使用建立在软件定义无线电平台上的无线通信测试平台。实验和性能测量表明,新的 ESN 架构能够为低成本和低功耗应用有效地处理现实世界的数据。
更新日期:2021-06-30
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