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High-throughput Near-Memory Processing on CNNs with 3D HBM-like Memory
ACM Transactions on Design Automation of Electronic Systems ( IF 1.4 ) Pub Date : 2021-06-28 , DOI: 10.1145/3460971
Naebeom Park 1 , Sungju Ryu 1 , Jaeha Kung 2 , Jae-Joon Kim 1
Affiliation  

This article discusses the high-performance near-memory neural network (NN) accelerator architecture utilizing the logic die in three-dimensional (3D) High Bandwidth Memory– (HBM) like memory. As most of the previously reported 3D memory-based near-memory NN accelerator designs used the Hybrid Memory Cube (HMC) memory, we first focus on identifying the key differences between HBM and HMC in terms of near-memory NN accelerator design. One of the major differences between the two 3D memories is that HBM has the centralized through- silicon-via (TSV) channels while HMC has distributed TSV channels for separate vaults. Based on the observation, we introduce the Round-Robin Data Fetching and Groupwise Broadcast schemes to exploit the centralized TSV channels for improvement of the data feeding rate for the processing elements. Using synthesized designs in a 28-nm CMOS technology, performance and energy consumption of the proposed architectures with various dataflow models are evaluated. Experimental results show that the proposed schemes reduce the runtime by 16.4–39.3% on average and the energy consumption by 2.1–5.1% on average compared to conventional data fetching schemes.

中文翻译:

具有 3D HBM 类内存的 CNN 上的高吞吐量近内存处理

本文讨论了利用三维 (3D) 高带宽内存 (HBM) 类内存中的逻辑芯片的高性能近内存神经网络 (NN) 加速器架构。由于之前报道的大多数基于 3D 内存的近内存 ​​NN 加速器设计都使用了混合内存立方体 (HMC) 内存,因此我们首先专注于确定 HBM 和 HMC 在近内存 NN 加速器设计方面的主要区别。两种 3D 存储器之间的主要区别之一是 HBM 具有集中的直通硅通孔 (TSV)通道,而 HMC 已为单独的保管库分发 TSV 通道。根据观察,我们介绍循环数据获取分组广播利用集中式 TSV 通道提高处理元件的数据馈送速率的方案。使用 28-nm CMOS 技术中的综合设计,评估具有各种数据流模型的提议架构的性能和能耗。实验结果表明,与传统的数据获取方案相比,所提出的方案平均减少了 16.4-39.3% 的运行时间,平均减少了 2.1-5.1% 的能耗。
更新日期:2021-06-28
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