A new nonvolatile static random access memory (nvSRAM) design based on the multi-level cell (MLC) characteristics of resistive RAMs (RRAMs) is presented in this brief to reduce the store energy of frequent-off and instant-on applications. The data store circuitry is designed to enable the energy-efficient multi-bit data backup of every two SRAM cells into a single four-level MLC RRAM of the proposed MLC-nvSRAM cell. Precharging restore scheme is employed to reduce the restore energy by suppressing the short-circuit and leakage currents when power supply is ramping up for data restore. Optimization method of multiple resistance states is also developed to maximize the restore yield considering the CMOS and RRAM process variations. The store and restore energy of the proposed MLC-nvSRAM circuit are reduced by 53.97% and 62.61%, respectively, as compared to the lowest store and restore energy of the previously published nvSRAM circuits based on single-level cell (SLC) RRAMs.

中文翻译：

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基于电阻开关多级单元的节能非易失性SRAM设计

本简介中介绍了一种基于电阻式 RAM (RRAM) 的多级单元 (MLC) 特性的新型非易失性静态随机存取存储器 (nvSRAM) 设计，以减少频繁关闭和即时开启应用的存储能量。数据存储电路旨在将每两个 SRAM 单元的高能效多位数据备份到建议的 MLC-nvSRAM 单元的单个四级 MLC RRAM 中。预充电恢复方案通过抑制短路和漏电流来降低恢复能量，当电源上升以进行数据恢复时。考虑到 CMOS 和 RRAM 工艺变化，还开发了多电阻状态的优化方法以最大化恢复良率。所提出的 MLC-nvSRAM 电路的存储和恢复能量分别降低了 53.97% 和 62.61%，