In this paper new continuous-time sigma delta modulator that supports complex band-pass (CBP) architectures with the re-configurable bandwidths of 5 and 10 MHz is presented. In this design a new CBP sigma delta ADC with less number of Gm cells and low power consumption has mentioned. A complex gm-c topology with positive feedback compensation, current reuse, feed forward techniques are used to reduce the power consumption. This work is done in CMOS 130 nm technology. The peak signal to noise plus distortion (SNDR) 67.3 dB is achieved both with 5 MHz and 10 MHz signal bandwidths with centre frequencies 4 MHz and 6 MHz respectively. This work is operated by 1.2 V supply voltage with 151.9 dB Figure of Merit (FoM) and with maximum dynamic range (DR) is 72.3 dB. The overall power consumption is 3.2 mW at 5 MHz and 4.5 mW at 10 MHz bandwidths.

在本文中，介绍了支持复杂带通 (CBP) 架构的新型连续时间 Sigma Delta 调制器，可重新配置带宽为 5 和 10 MHz。在这个设计中，提到了一种新的 CBP Sigma Delta ADC，它具有较少的 Gm 单元和低功耗。使用具有正反馈补偿、电流重用、前馈技术的复杂 gm-c 拓扑来降低功耗。这项工作是在 CMOS 130 nm 技术中完成的。峰值信噪比加失真 (SNDR) 67.3 dB 在 5 MHz 和 10 MHz 信号带宽下实现，中心频率分别为 4 MHz 和 6 MHz。这项工作由 1.2 V 电源电压运行，品质因数 (FoM) 为 151.9 dB，最大动态范围 (DR) 为 72.3 dB。总功耗在 5 MHz 时为 3.2 mW，在 10 MHz 带宽时为 4.5 mW。