Multicore architectures are being used in different sectors like automobile, avionics, and health-care. Correctness of shared data is the most important concern in multicore architectures. Sharing of data yields problem of cache coherence with inconsistent memory state that affects system performance. Conventional cache coherence protocols are not predictable in nature. Predictable Modified-Shared-Invalid method addressed the issue of unpredictability. This work proposes a slot stealing approach to interconnection bus with change in slot width. The predictability is applied to the Modified-Exclusive-Shared-Invalid variant of snoopy bus protocol with the proposed slot stealing approach. Implementation shows that the worst case latencies are reduced and following the analytical bound. Experimental results show the reduced execution time and energy in the configurations with 32 KB all set associative schemes compared with Predictable Modified-Shared-Invalid. The relative reductions in execution time and total energy are observed in the different configurations. The proposed slot stealing approach with Predictable Modified-Exclusive-Shared-Invalid protocol has reduced the worst case latencies, execution time, and energy consumption.

多核架构正被用于汽车、航空电子和医疗保健等不同领域。共享数据的正确性是多核架构中最重要的问题。数据共享会导致缓存一致性问题以及影响系统性能的不一致内存状态。传统的缓存一致性协议本质上是不可预测的。Predictable Modified-Shared-Invalid 方法解决了不可预测性问题。这项工作提出了一种插槽窃取方法来改变插槽宽度的互连总线。可预测性被应用于 snoopy 总线协议的 Modified-Exclusive-Shared-Invalid 变体，并采用所提出的插槽窃取方法。实施表明，最坏情况的延迟减少并遵循分析界限。实验结果表明，与可预测的修改共享无效相比，具有 32 KB 全集关联方案的配置减少了执行时间和能量。在不同的配置中观察到执行时间和总能量的相对减少。提议的插槽窃取方法采用可预测的修改-独占-共享-无效协议，减少了最坏情况的延迟、执行时间和能源消耗。