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High Performance and Optimal Configuration of Accurate Heterogeneous Block-Based Approximate Adder
arXiv - CS - Hardware Architecture Pub Date : 2021-06-16 , DOI: arxiv-2106.08800
Ebrahim Farahmand, Ali Mahani, Muhammad Abdullah Hanif, Muhammad Shafique

Approximate computing is an emerging paradigm to improve power and performance efficiency for error-resilient application. Recent approximate adders have significantly extended the design space of accuracy-power configurable approximate adders, and find optimal designs by exploring the design space. In this paper, a new energy-efficient heterogeneous block-based approximate adder (HBBA) is proposed; which is a generic/configurable model that can be transformed to a particular adder by defining some configurations. An HBBA, in general, is composed of heterogeneous sub-adders, where each sub-adder can have a different configuration. A set of configurations of all the sub-adders in an HBBA defines its configuration. The block-based adders are approximated through inexact logic configuration and truncated carry chains. HBBA increases design space providing additional design points that fall on the Pareto-front and offer better power-accuracy trade-off compared to other configurations. Furthermore, to avoid Mont-Carlo simulations, we propose an analytical modelling technique to evaluate the probability of error and Probability Mass Function (PMF) of error value. Moreover, the estimation method estimates delay, area and power of heterogeneous block-based approximate adders. Thus, based on the analytical model and estimation method, the optimal configuration under a given error constraint can be selected from the whole design space of the proposed adder model by exhaustive search. The simulation results show that our HBBA provides improved accuracy in terms of error metrics compared to some state-of-the-art approximate adders. HBBA with 32 bits length serves about 15% reduction in area and up to 17% reduction in energy compared to state-of-the-art approximate adders.

中文翻译:

基于异构块的精确近似加法器的高性能和优化配置

近似计算是一种新兴范式,可以提高容错应用程序的功耗和性能效率。最近的近似加法器显着扩展了精度功率可配置近似加法器的设计空间,并通过探索设计空间找到最佳设计。在本文中,提出了一种新的节能异构块近似加法器(HBBA);这是一个通用/可配置模型,可以通过定义一些配置将其转换为特定的加法器。通常,HBBA 由异构子加法器组成,其中每个子加法器可以具有不同的配置。HBBA 中所有子加法器的一组配置定义了其配置。基于块的加法器通过不精确的逻辑配置和截断的进位链来近似。HBBA 增加了设计空间,提供了位于帕累托前沿的额外设计点,并提供了与其他配置相比更好的功率精度权衡。此外,为了避免蒙特卡罗模拟,我们提出了一种分析建模技术来评估错误概率和错误值的概率质量函数 (PMF)。此外,估计方法估计基于异构块的近似加法器的延迟、面积和功率。因此,基于解析模型和估计方法,可以通过穷举搜索从所提出的加法器模型的整个设计空间中选择给定误差约束下的最优配置。仿真结果表明,与一些最先进的近似加法器相比,我们的 HBBA 在误差度量方面提供了更高的准确性。
更新日期:2021-06-17
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