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A high output resistance, wide bandwidth, and low input resistance current mirror using flipped voltage follower cell
International Journal of Circuit Theory and Applications ( IF 1.581 ) Pub Date : 2021-06-09 , DOI: 10.1002/cta.3085
Caffey Jindal, Rishikesh Pandey

The paper proposes a current mirror designed using the current sensor structure of class-AB flipped voltage follower cell at the input stage and super cascode structure at the output stage. The proposed current mirror offers low input resistance due to the current sensor at the input stage and high output resistance due to super cascode configuration at the output stage. The proposed current mirror offers a good dynamic range of 0 to 300 μA with less copying error of 0.54%, wide bandwidth of 319.8 MHz, high output resistance of 19.8 GΩ, and low input resistance of 161.34 Ω. The proposed current mirror is designed using BSIM3V3 180-nm CMOS technology and simulated using spectre in the Cadence Virtuoso analog design environment at room temperature. The Cadence Virtuoso layout XL editor has been used to design the physical layout of the proposed current mirror. The pre-layout and post-layout simulation results of the proposed current mirror have been shown to validate its performance. The Monte Carlo analysis has also been performed to analyze the effects of process variations and mismatches on the performance of the proposed current mirror.

中文翻译:

使用翻转电压跟随器单元的高输出电阻、宽带宽和低输入电阻电流镜

本文提出了一种电流镜设计,其输入级采用AB类翻转电压跟随器单元的电流传感器结构,输出级采用超级级联结构。由于输入级的电流传感器和输出级的超级级联配置,所提出的电流镜提供了低输入电阻和高输出电阻。所提出的电流镜提供 0 至 300 μA 的良好动态范围,复制误差为 0.54%,带宽为 319.8 MHz,输出电阻为 19.8 GΩ,输入电阻为 161.34 Ω。建议的电流镜是使用 BSIM3V3 180-nm CMOS 技术设计的,并在室温下的 Cadence Virtuoso 模拟设计环境中使用 spectre 进行模拟。Cadence Virtuoso 布局 XL 编辑器已用于设计提议的电流镜的物理布局。所提出的电流镜的布局前和布局后仿真结果已被证明可以验证其性能。还进行了蒙特卡罗分析,以分析工艺变化和失配对所提出的电流镜性能的影响。
更新日期:2021-06-09
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