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A Broadband, mm-Wave SPST Switch With Minimum 50-dB Isolation in 45-nm SOI-CMOS
IEEE Transactions on Microwave Theory and Techniques ( IF 4.3 ) Pub Date : 2021-03-26 , DOI: 10.1109/tmtt.2021.3066977
Ayman Eltaliawy , John R. Long

This article describes a single-pole, single-throw (SPST) CMOS switch aimed at integrated transceiver applications. The SPST switch realizes better than 50-dB isolation (ISO) across dc-to-43 GHz while maintaining an insertion loss (IL) below 3 dB. To maximize ISO, substrate coupling is compensated using bilateral RF signal cancellation in a fully differential circuit topology. Measured RF input power for 1-dB compression (IP 1dB ) of the IL is +19.6 dBm, and the measured input third-order intercept point is +30.4 dBm (both assuming differential inputs at 20 GHz). The prototype is fabricated in GlobalFoundries 45-nm RF-SOI CMOS technology and has an active area of 0.0058 mm 2 . Monte Carlo simulations predict variations due to processing of 8.3% and 2.75% in IL and ISO, respectively, ±0.2 dB variation (for both IL and ISO) from a 5% change in supply voltage, and ±0.1-dB variation (both IL and ISO) for a 0 °C–85 °C temperature sweep.

中文翻译:

在 45-nm SOI-CMOS 中具有最小 50-dB 隔离度的宽带毫米波 SPST 开关

本文介绍了一种针对集成收发器应用的单刀单掷 (SPST) CMOS 开关。SPST 开关在 DC 至 43 GHz 范围内实现了优于 50 dB 的隔离 (ISO),同时将插入损耗 (IL) 保持在 3 dB 以下。为了最大限度地提高 ISO,在全差分电路拓扑中使用双边 RF 信号消除来补偿基板耦合。 IL 的1dB压缩 (IP 1dB ) 的测得 RF 输入功率为 +19.6 dBm,测得的输入三阶截取点为 +30.4 dBm(均假设差分输入为 20 GHz)。该原型采用 GlobalFoundries 45-nm RF-SOI CMOS 技术制造,有效面积为 0.0058 mm 2 . Monte Carlo 模拟分别预测了由于处理 IL 和 ISO 8.3% 和 2.75% 引起的变化,电源电压变化 5% 的 ±0.2 dB 变化(IL 和 ISO),以及 ±0.1-dB 变化(IL 和 ISO)和 ISO) 进行 0 °C–85 °C 温度扫描。
更新日期:2021-06-04
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