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CMOS back-end-of-line compatible ferroelectric tunnel junction devices
Solid-State Electronics ( IF 1.7 ) Pub Date : 2021-05-29 , DOI: 10.1016/j.sse.2021.108054
Veeresh Deshpande , Keerthana Shajil Nair , Marco Holzer , Sourish Banerjee , Catherine Dubourdieu

Ferroelectric tunnel junction devices based on ferroelectric thin films of solid solutions of hafnium dioxide can enable CMOS integration of ultra-low power ferroelectric devices with potential for memory and emerging computing schemes such as in-memory computing and neuromorphic applications. In this work, we present ferroelectric tunnel junctions based on Hf0.5Zr0.5O2 with materials and processes compatible with CMOS back-end-of-line integration. We show a device architecture based on W-Hf0.5Zr0.5O2-Al2O3-TiN stacks featuring low temperature annealing at 400° with performance comparable to those obtained with higher temperature annealing conditions.



中文翻译:

CMOS 后端兼容铁电隧道结器件

基于二氧化铪固溶体铁电薄膜的铁电隧道结器件可以实现超低功率铁电器件的 CMOS 集成,具有内存和新兴计算方案(如内存计算和神经形态应用)的潜力。在这项工作中,我们提出了基于 Hf 0.5 Zr 0.5 O 2 的铁电隧道结,其材料和工艺与 CMOS 后端集成兼容。我们展示了基于 W-Hf 0.5 Zr 0.5 O 2 -Al 2 O 3的器件架构-TiN 堆栈具有 400° 低温退火的特性,其性能可与高温退火条件下获得的性能相媲美。

更新日期:2021-06-25
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