Nowadays, the high number of devices and applications connected to the Internet has generated a great amount of data being which makes privacy and protection a more challenging task. In addition, new technologies, such as the Internet of Things, incorporate many resource-constrained devices in the network. Reliable cryptography algorithms have to be employed to deal with this problem, which also needs to be efficiently implemented in small devices. There are several algorithms for this purpose, among them, neural cryptography. In this context, this work proposes the implementation of an artificial neural network architecture called tree parity machine (TPM) to perform the exchange of keys through the mutual learning of these networks. This method is not based on number theory, which makes it less computationally costly, and can be an alternative for embedded systems, which generally have several limitations in the processing capacity and resources used. In the area of embedded systems, FPGAs have gained more space, thanks to their reconfiguration capacity. Thus, different methods for implementing a TPM in FPGA were tested and analyzed, in order to optimize the following performance parameters, the response time, the maximum frequency of operation, and the consumed area of the FPGA considering logical elements, embedded multipliers, and registers. In addition, software implementation based on a multi-core CPU was used for comparison purposes. Experimental results demonstrated that the implementation of parallelism in FPGA for different blocks of the TPM weight matrix reached the best performance results. Thus, our proposal intends to develop an economic component in terms of resource consumption, however, maintaining the characteristic of high processing capacity. Therefore, the methodologies presented in this paper intends to be a useful reference to optimize future implementations in FPGA for cryptography applications.

如今，连接到Internet的大量设备和应用程序产生了大量的数据，这使得隐私和保护成为一项更具挑战性的任务。另外，诸如物联网的新技术在网络中结合了许多资源受限的设备。必须采用可靠的密码算法来解决此问题，这也需要在小型设备中有效实现。有几种用于此目的的算法，其中包括神经密码术。在这种情况下，这项工作提出了一种称为树奇偶校验机（TPM）的人工神经网络架构的实现，以通过这些网络的相互学习来执行密钥交换。此方法不是基于数论的，因此它的计算成本更低，并且可以替代嵌入式系统，因为嵌入式系统通常在处理能力和使用的资源上有一些限制。在嵌入式系统领域，由于具有重新配置能力，FPGA已经获得了更多的空间。因此，测试和分析了用于在FPGA中实现TPM的不同方法，以优化以下性能参数，响应时间，最大操作频率以及考虑逻辑元素，嵌入式乘法器和寄存器的FPGA消耗区域。 。另外，出于比较目的，使用了基于多核CPU的软件实现。实验结果表明，在FPGA中对TPM权重矩阵的不同块执行并行处理可达到最佳性能。因此，我们的建议旨在开发一种资源消耗方面的经济要素，但是要保持高处理能力的特征。因此，本文提出的方法旨在为优化将来用于密码学应用的FPGA中的实现提供有用的参考。