The reconfigurable computing paradigm with field programmable gate arrays (FPGAs) has received renewed interest in the high-performance computing field due to FPGAs’ unique combination of performance and energy efficiency. However, difficulties in programming and optimizing FPGAs have prevented them from being widely accepted as general-purpose computing devices. In accelerator-based heterogeneous computing, portability across diverse heterogeneous devices is also an important issue, but the unique architectural features in FPGAs make this difficult to achieve. To address these issues, a directive-based, high-level FPGA programming and optimization framework was previously developed. In this work, developed optimizations were combined holistically using the directive-based approach to show that each individual benchmark requires a unique set of optimizations to maximize performance. We perform this exploration on Intel Arria 10 and Stratix 10 FPGAs. We also explored the relationships between performance, resource usages, and compilation times, and investigated implications for performance portability. Finally, we present an initial evaluation of a real-world proxy application, LULESH.

由于FPGA在性能和能效方面的独特结合，具有现场可编程门阵列（FPGA）的可重构计算范例已引起人们对高性能计算领域的新兴趣。但是，由于难以对FPGA进行编程和优化，因此无法将它们广泛地用作通用计算设备。在基于加速器的异构计算中，跨各种异构设备的可移植性也是一个重要的问题，但是FPGA独特的架构特性使这一点难以实现。为了解决这些问题，以前已经开发了基于指令的高级FPGA编程和优化框架。在这项工作中，使用基于指令的方法对已开发的优化进行整体​​组合，以表明每个基准测试都需要一组独特的优化来最大化性能。我们在Intel Arria 10和Stratix 10 FPGA上进行了这项探索。我们还探讨了性能，资源使用情况和编译时间之间的关系，并研究了对性能可移植性的影响。最后，我们对真实的代理应用程序LULESH进行了初步评估。