The Controller model is a heterogeneous parallel programming model implemented as a library. It transparently manages the coordination, communication and kernel launching details on different heterogeneous computing devices. It exploits native or vendor specific programming models and compilers, such as OpenMP, CUDA or OpenCL, thus enabling the potential performance obtained by using them. This work discusses the integration of FPGAs in the Controller model, using high-level synthesis tools and OpenCL. A new Controller backend for FPGAs is presented based on a previous OpenCL backend for GPUs. We discuss new configuration parameters for FPGA kernels and key ideas to adapt the original OpenCL backend while maintaining the portability of the original model. We present an experimental study to compare performance and development effort metrics obtained with the Controller model, Intel oneAPI and reference codes directly programmed with OpenCL. The results show that using the Controller library has advantages and drawbacks compared with Intel oneAPI, while compared with OpenCL it highly reduces the programming effort with negligible performance overhead.

Controller模型是实现为库的异构并行编程模型。它透明地管理不同异构计算设备上的协调，通信和内核启动细节。它利用本机或特定于供应商的编程模型和编译器（例如OpenMP，CUDA或OpenCL），从而实现通过使用它们获得的潜在性能。这项工作使用高级综合工具和OpenCL讨论了FPGA模型在Controller模型中的集成。基于以前的GPU的OpenCL后端，提供了一个新的FPGA控制器后端。我们讨论了FPGA内核的新配置参数和在保持原始模型可移植性的同时，适应原始OpenCL后端的关键思想。我们提供了一项实验研究，以比较通过Controller模型，Intel oneAPI和直接用OpenCL编程的参考代码获得的性能和开发工作量度。结果表明，与Intel oneAPI相比，使用Controller库具有优缺点，而与OpenCL相比，它可以大大减少编程工作，而性能开销却可以忽略不计。