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A 10-bit 300 MS/s pipeline ADC with time-domain MDAC
Analog Integrated Circuits and Signal Processing ( IF 1.4 ) Pub Date : 2021-05-04 , DOI: 10.1007/s10470-021-01858-3
Hsin-Shu Chen , Chien-Jian Tseng , Yu-Wei Chuang , Chun-Wei Chang

A 10-bit 300 MS/s pipeline ADC utilizing time-domain MDAC is presented. The time-domain MDAC using only current sources and comparators to execute both signal subtraction and amplification is proposed to realize an opamp-less power-efficient structure without calibration. At the conversion rate of 300 MS/s with Nyquist input frequency, the ADC simulated in 40-nm CMOS exhibits an ENOB of 9.38 and 7.96 bits without and with device noise, respectively. It dissipates 19 mW at 1.2 V supply, where one-third of the power is consumed by the low-noise comparator. The noise analysis of the proposed time-domain MDAC is addressed. The active area of the ADC is 0.1 mm2.



中文翻译:

具有时域MDAC的10位300 MS / s流水线ADC

提出了一种利用时域MDAC的10位300 MS / s流水线ADC。提出了仅使用电流源和比较器来执行信号减法和放大的时域MDAC,以实现无需校准的无运算放大器功率效率结构。在奈奎斯特(Nyquist)输入频率下以300 MS / s的转换速率,在40-nm CMOS中模拟的ADC的ENOB分别为9.38和7.96位,无器件噪声和器件噪声。它在1.2 V电源下的功耗为19 mW,低噪声比较器消耗了三分之一的功率。提出的时域MDAC的噪声分析得到解决。ADC的有效面积为0.1 mm 2

更新日期:2021-05-05
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