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SMUL-FFT: A Streaming Multiplierless Fast Fourier Transform
IEEE Transactions on Circuits and Systems II: Express Briefs ( IF 4.4 ) Pub Date : 2021-03-08 , DOI: 10.1109/tcsii.2021.3064238
Seyed Hadi Mirfarshbafan , Sueda Taner , Christoph Studer

Beamspace processing is an emerging paradigm to reduce hardware complexity in all-digital millimeter-wave (mmWave) massive multiple-input multiple-output (MIMO) basestations. This approach exploits sparsity of mmWave channels but requires spatial discrete Fourier transforms (DFTs) across the antenna array, which must be performed at the baseband sampling rate. To mitigate the resulting DFT hardware implementation bottleneck, we propose a fully-unrolled Streaming MUltiplierLess (SMUL) fast Fourier Transform (FFT) engine that performs one transform per clock cycle. The proposed SMUL-FFT architecture avoids hardware multipliers by restricting the twiddle factors to a sum-of-powers-of-two, resulting in substantial power and area savings. Compared to state-of-the-art FFTs, our SMUL-FFT ASIC designs in 65nm CMOS demonstrate more than 45% and 17% improvements in energy-efficiency and area-efficiency, respectively, without noticeably increasing the error-rate in mmWave massive MIMO systems.

中文翻译:

SMUL-FFT:流式无乘法器快速傅立叶变换

波束空间处理是一种新兴的范例,可以降低全数字毫米波(mmWave)大规模多输入多输出(MIMO)基站的硬件复杂性。这种方法利用了毫米波信道的稀疏性,但需要在天线阵列上进行空间离散傅立叶变换(DFT),这必须以基带采样率执行。为了缓解由此产生的DFT硬件实施瓶颈,我们提出了一种完全展开的流式多播(SMUL)快速傅里叶变换(FFT)引擎,该引擎在每个时钟周期执行一次变换。所提出的SMUL-FFT体系结构通过将旋转因子限制为2的幂之和,从而避免了硬件乘法器,从而节省了大量的功率和面积。与最新的FFT相比,
更新日期:2021-05-04
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