当前位置: X-MOL 学术IEEE Trans. Circuit Syst. II Express Briefs › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
Energy Efficient In-Memory Hyperdimensional Encoding for Spatio-Temporal Signal Processing
IEEE Transactions on Circuits and Systems II: Express Briefs ( IF 4.4 ) Pub Date : 2021-03-25 , DOI: 10.1109/tcsii.2021.3068126
Geethan Karunaratne , Manuel Le Gallo , Michael Hersche , Giovanni Cherubini , Luca Benini , Abu Sebastian , Abbas Rahimi

The emerging brain-inspired computing paradigm known as hyperdimensional computing (HDC) has been proven to provide a lightweight learning framework for various cognitive tasks compared to the widely used deep learning-based approaches. Spatio-temporal (ST) signal processing, which encompasses biosignals such as electromyography (EMG) and electroencephalography (EEG), is one family of applications that could benefit from an HDC-based learning framework. At the core of HDC lie manipulations and comparisons of large bit patterns, which are inherently ill-suited to conventional computing platforms based on the von-Neumann architecture. In this work, we propose an architecture for ST signal processing within the HDC framework using predominantly in-memory compute arrays. In particular, we introduce a methodology for the in-memory hyperdimensional encoding of ST data to be used together with an in-memory associative search module. We show that the in-memory HDC encoder for ST signals offers at least $1.80\times $ energy efficiency gains, $3.36\times $ area gains, as well as $9.74\times $ throughput gains compared with a dedicated digital hardware implementation. At the same time it achieves a peak classification accuracy within 0.04% of that of the baseline HDC framework.

中文翻译:

时空信号处理的高效节能内存中超维编码

与广泛使用的基于深度学习的方法相比,已被证明的新兴的大脑启发式计算范例超维计算(HDC)可为各种认知任务提供轻量级的学习框架。时空(ST)信号处理包括生物信号,例如肌电图(EMG)和脑电图(EEG),是可以从基于HDC的学习框架中受益的一系列应用程序。HDC的核心在于对大位模式的操作和比较,这本来就不适合基于von-Neumann架构的常规计算平台。在这项工作中,我们提出了一种主要使用内存中的计算阵列在HDC框架内进行ST信号处理的体系结构。特别是,我们介绍了一种用于ST数据的内存超维编码的方法,该方法将与内存内关联搜索模块一起使用。我们表明,用于ST信号的内存HDC编码器至少可提供 $ 1.80 \次$ 能源效率的提高, $ 3.36 \次$ 面积增加,以及 $ 9.74 \次$ 与专用数字硬件实现相比,吞吐量提高了。同时,它实现的峰值分类精度在基准HDC框架的0.04%之内。
更新日期:2021-05-04
down
wechat
bug