In this study, we propose a nanomagnetic logic (NML) based 2 bit multiplier architecture design for the first time to the best of author’s knowledge. This complex combinational logic (nanomagnetic multiplier) design proposed is built by exploiting shape, positional hybrid anisotropy and the ferromagnetically coupled fixed input majority gate. Subsequently, we extend this proposed multiplier architecture along with the NML adder architecture in introducing NML based convolution architecture design which is efficient in terms of number of nanomagnets, majority gates and clock-cycles. The proposed NML design yields ∼21%–72%, ∼26%–42%, ∼36%–63%, and ∼20%–68%, reduction in the required number of nanomagnets, majority gate, clock cycles and energy compared to the state-of-the-art designs.

在这项研究中，我们首次根据作者的知识提出了基于纳米磁性逻辑 (NML) 的 2 位乘法器架构设计。提出的这种复杂的组合逻辑（纳米磁性乘法器）设计是通过利用形状、位置混合各向异性和铁磁耦合固定输入多数门构建的。随后，我们扩展了这个提议的乘法器架构以及 NML 加法器架构，以引入基于 NML 的卷积架构设计，该设计在纳米磁体、多数门和时钟周期的数量方面是有效的。所提出的 NML 设计产生 ∼21%–72%、∼26%–42%、∼36%–63% 和 ∼20%–68%，所需的纳米磁体、多数门、时钟周期和能量的数量减少到最先进的设计。