High-resolution, low-latency apps in computer vision are ubiquitous in today’s world of mixed-reality devices. These innovations provide a platform that can leverage the improving technology of depth sensors and embedded accelerators to enable higher-resolution, lower-latency processing for 3D scenes using depth-upsampling algorithms. This research demonstrates that filter-based upsampling algorithms are feasible for mixed-reality apps using low-power hardware accelerators. The authors parallelized and evaluated a depth-upsampling algorithm on two different devices: a reconfigurable-logic FPGA embedded within a low-power SoC; and a fixed-logic embedded graphics processing unit. We demonstrate that both accelerators can meet the real-time requirements of 11 ms latency for mixed-reality apps. 1

中文翻译：

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嵌入式加速器上的实时、高分辨率深度上采样

计算机视觉中的高分辨率、低延迟应用程序在当今的混合现实设备世界中无处不在。这些创新提供了一个平台，可以利用深度传感器和嵌入式加速器的改进技术，使用深度上采样算法为 3D 场景实现更高分辨率、更低延迟的处理。这项研究表明，基于滤波器的上采样算法对于使用低功耗硬件加速器的混合现实应用程序是可行的。作者在两种不同的设备上并行并评估了深度上采样算法：嵌入在低功耗 SoC 中的可重构逻辑 FPGA；和一个固定逻辑的嵌入式图形处理单元。我们证明这两种加速器都可以满足混合现实应用程序 11 毫秒延迟的实时要求。1