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A Hardware-Based Memory-Efficient Solution for Pair-Wise Compact Sequence Alignment
IETE Journal of Research ( IF 1.5 ) Pub Date : 2021-04-23 , DOI: 10.1080/03772063.2021.1914200
Ardhendu Sarkar 1 , Surajeet Ghosh 1 , Sanchita Saha Ray 2
Affiliation  

A hardware-based memory-efficient sequence alignment architecture is described in this paper. This paper expresses a comprehensive blueprint of the hardware implementation of compact sequence alignment for pair-wise global alignment technique to achieve high-throughput processing. This architecture uses SRAM and only a small amount of digital logic circuitry to perform elementary operations of sequence alignment in real time. Additionally, this alignment engine does not require any preprocessing operations like in most of the existing alignment approaches do. Furthermore, it does not call for any sort of comparison mechanism for preparing final sequence alignment by the alignment co-processor. The entire architecture is simulated and synthesized in FPGA board for numerous cases considering dissimilar pseudo-randomly generated sequence pairs with variable sequence lengths ranging from 16 to 2048 nucleotides. The proposed design exhibits compact alignment of the sequences that leads to the identification of close similarity between the sequences under test. Moreover, the proposed alignment engine takes significantly less amount of time, ≈64–95% less time, and ≈85–99% less amount of memory space than existing alignment approaches. The overall system performance is studied with respect to Millions Alignments Per Second (MAPS) and exhibits ≈55–75% more sequence alignments of same set of DNA sequences in a stipulated time compared to existing schemes.



中文翻译:

用于成对紧凑序列比对的基于硬件的内存高效解决方案

本文描述了一种基于硬件的内存高效序列比对架构。本文提出了成对全局比对技术的紧凑序列比对硬件实现的全面蓝图,以实现高通量处理。该架构使用 SRAM 和少量数字逻辑电路来实时执行序列对齐的基本操作。此外,该对齐引擎不需要像大多数现有对齐方法那样进行任何预处理操作。此外,它不需要任何类型的比较机制来由比对协处理器准备最终的序列比对。整个架构在 FPGA 板中针对多种情况进行模拟和综合,考虑不同的伪随机生成的序列对,其可变序列长度范围为 16 至 2048 个核苷酸。所提出的设计表现出序列的紧凑比对,从而识别出被测序列之间的密切相似性。此外,与现有对齐方法相比,所提出的对齐引擎所需的时间显着减少,约减少 64–95% 的时间,约减少约 85–99% 的内存空间。整体系统性能根据每秒数百万次比对 (MAPS) 进行研究,与现有方案相比,在规定时间内同一组 DNA 序列的序列比对数量增加约 55–75%。所提出的设计表现出序列的紧凑比对,从而识别出被测序列之间的密切相似性。此外,与现有对齐方法相比,所提出的对齐引擎所需的时间显着减少,约减少 64–95% 的时间,约减少约 85–99% 的内存空间。整体系统性能根据每秒数百万次比对 (MAPS) 进行研究,与现有方案相比,在规定时间内同一组 DNA 序列的序列比对数量增加约 55–75%。所提出的设计表现出序列的紧凑比对,从而识别出被测序列之间的密切相似性。此外,与现有对齐方法相比,所提出的对齐引擎所需的时间显着减少,约减少 64–95% 的时间,约减少约 85–99% 的内存空间。整体系统性能根据每秒数百万次比对 (MAPS) 进行研究,与现有方案相比,在规定时间内同一组 DNA 序列的序列比对数量增加约 55–75%。

更新日期:2021-04-23
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