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Circuit Modeling for RRAM-Based Neuromorphic Chip Crossbar Array With and Without Write-Verify Scheme
IEEE Transactions on Circuits and Systems I: Regular Papers ( IF 5.1 ) Pub Date : 2021-03-04 , DOI: 10.1109/tcsi.2021.3060798
Tuomin Tao , Hanzhi Ma , Quankun Chen , Zhe-Ming Gu , Hang Jin , Manareldeen Ahmed , Shurun Tan , Aili Wang , En-Xiao Liu , Er-Ping Li

This article presents a novel circuit modeling method for online training and testing process of the neuromorphic chip crossbar array based on the resistive random access memory (RRAM). A modified RRAM compact model is developed to realize the fast and accurate update of multiple conductance levels. Two training mechanisms with and without write-verify scheme are modeled and investigated for classifying MNIST handwritten digits and both achieve a good recognition accuracy of more than 96%. The parasitic model of the unit cell of interconnects is constructed by the domain decomposition method (DDM) and the partial equivalent element circuit (PEEC) method, which is suitable to build up a crossbar array of any size. The impact of parasitic effects of interconnects on the recognition accuracy with and without write-verify scheme is analyzed and compared. The weights trained with write-verify scheme show better robustness to parasitic noises but training with write-verify scheme spends a longer time processing the same amount of data.

中文翻译:

具有和不具有写入验证方案的基于RRAM的神经形态芯片交叉开关阵列的电路建模

本文提出了一种新的基于电阻随机存取存储器(RRAM)的神经形态芯片交叉开关阵列在线训练和测试过程的电路建模方法。开发了一种改进的RRAM紧凑模型,以实现快速,准确地更新多个电导级别。对有和没有写验证方案的两种训练机制进行了建模和研究,以对MNIST手写数字进行分类,并且都达到了96%以上的良好识别精度。互连单元的寄生模型是通过域分解方法(DDM)和部分等效元件电路(PEEC)方法构建的,适用于构建任何大小的交叉开关阵列。分析和比较了有和没有写验证方案的情况下,互连寄生效应对识别精度的影响。用写验证方案训练的权重对寄生噪声显示出更好的鲁棒性,但是用写验证方案训练的权重花费更长的时间来处理相同数量的数据。
更新日期:2021-04-20
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