Superconducting digital electronics, especially Single Flux Quantum (SFQ), has emerged as a promising beyond-CMOS technology with Josephson junctions (JJ) as the active device. It has the potential to meet the booming demands of lower power consumption and higher operation speeds in the electronics industry and future exascale supercomputing systems. Despite these promises, scaling SFQ circuits remains a serious challenge that motivates the support of multiple SFQ clock domains. Towards this end, this paper analyzes the impact of setup time violations and metastability in SFQ circuits comparing the derived analytical models to their CMOS counterparts. It also proposes new techniques to reduce the average latency in metastability-tolerant SFQ synchronizers, and evaluates their effects on the layout and critical margin of the design. It further extends the proposed model to estimate the Mean Time Between Failure (MTBF) of flip-flop-based synchronizers and shows that their MTBF with the current feature sizes is unaffected by noise, similar to CMOS. Finally, it curve fits this model to simulations using the state-of-the-art SFQ5ee process and shows that a two-flop SFQ synchronizer with a clock frequency of 25 GHz has an estimated MTBF of ~10 ⁶ years.

中文翻译：

---

超导单通量量子（SFQ）逻辑中的亚稳定性

超导数字电子技术，特别是单通量量子（SFQ），已经成为一种有前途的超越CMOS技术，以约瑟夫森结（JJ）作为有源器件。它有潜力满足电子行业和未来的亿万亿次超级计算系统对低功耗和高运行速度的迅猛需求。尽管有这些承诺，但扩展SFQ电路仍然是一个严峻的挑战，它激发了多个SFQ时钟域的支持。为此，本文将派生的分析模型与CMOS对应模型进行了比较，分析了SFQ电路中建立时间违规和亚稳性的影响。它还提出了新技术，以减少耐亚稳态SFQ同步器中的平均延迟，并评估它们对设计的布局和临界裕度的影响。它进一步扩展了提出的模型，以估计基于触发器的同步器的平均故障间隔时间（MTBF），并显示了与CMOS类似的具有当前特征尺寸的MTBF不受噪声影响。最后，它的曲线将该模型拟合为使用最新SFQ5ee工艺进行的仿真，结果表明，时钟频率为25 GHz的两触发器SFQ同步器的估计MTBF约为10 ⁶年