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CNTFET design of a multiple-port ternary register file
Microelectronics Journal ( IF 2.2 ) Pub Date : 2021-04-20 , DOI: 10.1016/j.mejo.2021.105076
Amr Mohammaden , Mohammed E. Fouda , Ihsen Alouani , Lobna A. Said , Ahmed G. Radwan

Ternary number system offers higher information processing within the same number of digits when compared to binary systems. Such advantage motivated the development of ternary processing units especially with CNTFET which offers better power and delay results compared to CMOS-based realization. In this paper, we propose a variety of circuit realizations for the ternary memory elements that are needed in any processor including ternary D-latch, and ternary D-flip-flop. These basic building blocks are then used to design a ternary register file with multiple read and write ports. This paper is an attempt to investigate the performance aspects of using ternary RF to open the gate of more contributions and research in the direction of full ternary computer architecture. The proposed designs have been compared in terms of power, area, and latency at different supply voltages and operating temperatures.



中文翻译:

多端口三态寄存器文件的CNTFET设计

与二进制系统相比,三进制数字系统在相同的数字位数内提供了更高的信息处理能力。这种优势推动了三元处理单元的发展,尤其是CNTFET,与基于CMOS的实现相比,它提供了更好的功率和延迟结果。在本文中,我们为包括三元D锁存器和三元D触发器在内的任何处理器中所需的三元存储元件提出了多种电路实现方案。然后,这些基本构件用于设计具有多个读取和写入端口的三元寄存器文件。本文试图研究使用三态RF打开更多贡献之门的性能方面,并朝着完整的三态计算机体系结构的方向进行研究。拟议的设计已在功率,面积,

更新日期:2021-04-27
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