The voltage amplification of a ferroelectric layer was studied for advanced complementary metal–oxide–semiconductor (CMOS) applications. To match the capacitance for negative-capacitance field-effect transistors (NC-FETs), a method of adjusting the MOS capacitance is proposed by optimizing the width (W) and height/depth (H) in two types of ferroelectric gate-stack 2D metal-oxide semiconductor capacitor (MOSCAP) structures: a fin-like structure and a trench structure. The capacitance of the semiconductor was modeled to match that of the ferroelectric films to obtain hysteresis-free operation (ΔV_T = V_T, for –V_T,rev ~ 0) and achieve voltage amplification (A_V). The optimized conditions are found to be H = 19.3 nm and 24.3 nm to achieve the criterion with A_V > 50 for the fin-like and trench structure, respectively. Subsequently, the structure was extended to a three-dimensional (3D) fin-shaped field-effect transistor (FinFET) to evaluate the effects of varying geometrical parameters such as the fin spacing (F_S). Tuning F_S can not only enhance the on-current but also decrease the subthreshold swing in the off-current region. For the FET, the use of the optimum F_S value of 30 nm helps the FinFETs achieve capacitance matching with A_V > 30. The subthreshold swing of the NC-FinFET is improved by about 47% for H_FinFET/W_FinFET ~ 3 and F_s/H_FinFET ~ 1.2 as compared with the conventional FinFET. The concept of coupling the polarized Hf-based oxide in NC-FETs that is demonstrated to be feasible herein is thus practicable using current CMOS architectures.

研究了铁电层的电压放大，以用于先进的互补金属氧化物半导体（CMOS）应用。为了匹配负电容场效应晶体管（NC-FET）的电容，提出了一种通过优化两种铁电栅堆叠2D的宽度（W）和高度/深度（H）来调整MOS电容的方法。金属氧化物半导体电容器（MOSCAP）结构：鳍状结构和沟槽结构。对半导体的电容进行建模以匹配铁电薄膜的电容，以获得无磁滞工作（ΔV _T  =  V _T，– V _T，rev〜0  ）并实现电压放大（A_V）。发现优化条件为H  = 19.3 nm和24.3 nm，以分别达到 鳍状和沟槽结构的A _V > 50的标准。随后，将结构扩展到三维（3D）鳍形场效晶体管（FinFET），以评估不同的几何参数的影响，如翅片间距（˚F_小号）。调整F _S不仅可以增强导通电流，而且可以减小截止电流区域中的亚阈值摆幅。对于FET，使用30 nm的最佳F _S值有助于FinFET实现与A _V的电容匹配 > 30. 与传统的FinFET相比，对于H _FinFET / W _FinFET〜3 和F _s / H _FinFET〜1.2，NC-FinFET的亚阈值摆幅提高了约47％。因此，使用当前的CMOS体系结构，在本文中被证明是可行的在NC-FET中耦合极化的基于Hf的氧化物的概念是可行的。