A paradigm shift has been witnessed in microelectronic industry in recent days with more and more research works focusing on transformation of Integrated Circuits from 2 to 3D. Heterogeneous systems in the same platform are implemented via stacking several planar chips vertically based on through-silicon-via (TSV) technology. To overcome the optimization issue of 3D IC design, the shuffled frog leaping algorithm has been implemented, and optimization of area and TSVs count is achieved. The moth flame optimization is preferred because of its capability of acquiring efficient solution from the fitness function. And the probability is also estimated finally to forecast the best score for area optimization. Here the layer’s temperature is optimized by balancing the area and TSVs count using Moth flame optimization algorithm where the fitness function and flame number is updated for each iteration to obtain the area with best score. Thus, the performance is analyzed with the existing work to prove its superiority and the similar dataset was utilized for the comparison to analyze the optimization of TSVs count. Thus, it was experimentally verified that our proposed method achieves effective optimization in terms of reducing the area TSVs count.

近年来，在微电子工业中已经看到了范式的转变，越来越多的研究工作集中在将集成电路从2D转换为3D。同一平台上的异构系统是通过基于硅通孔（TSV）技术的垂直堆叠几个平面芯片来实现的。为克服3D IC设计的优化问题，实现了改组蛙跳算法，并实现了面积和TSV数量的优化。飞蛾火焰优化是优选的，因为它具有从适应度函数中获取有效解的能力。并最终估计概率，以预测区域优化的最佳分数。在这里，通过使用Moth火焰优化算法平衡面积和TSV计数来优化层的温度，在该算法中，适应性函数和火焰数针对每次迭代进行更新，以获得得分最高的面积。因此，通过现有工作对性能进行分析以证明其优越性，并使用相似的数据集进行比较以分析TSV计数的优化。因此，通过实验验证了我们提出的方法在减少面积TSV数量方面实现了有效的优化。