In this paper, firstly, a new basic structure is proposed, and then, the extended structure which is made up of the series connection of the basic units is proposed. Two algorithms are presented to calculate the magnitude of DC voltage sources in order to generate all positive and negative voltage levels (even and odd) at the output. The suggested structure is optimized to generate the maximum number of output voltage levels using the minimum number of components, gate driver circuits, DC voltage sources, minimum variety of DC voltage sources and less blocking voltage on the switches. Fewer numbers of components and variety of DC voltage sources are the main advantages of the proposed topology which lead to lower cost and control complexity. The mentioned advantages are verified by comparison studies of the proposed cascaded topology with most of the other recently presented topologies. Finally, the performance of the proposed topology is confirmed by the experimental results.

本文首先提出了一种新的基本结构，然后提出了由基本单元的串联组成的扩展结构。提出了两种算法来计算直流电压源的大小，以便在输出端生成所有正负电压电平（偶数和奇数）。建议的结构经过优化，可使用最少数量的组件，栅极驱动器电路，直流电压源，最少种类的直流电压源和较少的开关阻塞电压来产生最大数量的输出电压电平。更少的组件数量和各种DC电压源是所建议拓扑的主要优点，可降低成本和控制复杂性。所提到的优点通过对所提出的级联拓扑与大多数其他最近提出的拓扑的比较研究得到了验证。最后，实验结果证实了所提出拓扑的性能。