an improved small-signal model for the GaN pseudomorphic high electron mobility transistor (P-HEMT) process is proposed in this paper. Experimental studies have found that a high positive bias voltage usually damages or destroys the Schottky grid. In order to solve this problem, a method of extracting parasitic inductance and parasitic resistance using low gate bias voltage technology is proposed. Experimental research found that the parasitic circuit parameters will change with the bias voltage. New intrinsic resistance (R_L) and intrinsic inductance (L_ds) are introduced into the intrinsic equivalent circuit to suppress its bias dependence to solve this problem. At the same time, it is found that there is a time delay phenomenon in the parasitic parameter model, so the RC network (R_pds and C_pds, R_pgd and C_pgd) is introduced to represent this phenomenon. It is successfully applied to model a GaN P-HEMT. Excellent agreement between measured and modeled S-parameters is obtained from 0.5 to 20.5 GHz.

本文提出了一种改进的GaN伪高电子迁移率晶体管（P-HEMT）工艺的小信号模型。实验研究发现，高的正偏置电压通常会损坏或破坏肖特基栅极。为了解决这个问题，提出了一种利用低栅极偏置电压技术提取寄生电感和寄生电阻的方法。实验研究发现，寄生电路参数会随偏置电压而变化。新的本征电阻（R _L）和本征电感（L _ds）被引入到本征等效电路中以抑制其偏置依赖性，从而解决了这一问题。同时，发现寄生参数模型中存在时间延迟现象，因此引入了RC网络（R _pds和C _pds，R _pgd和C _pgd）来表示这种现象。它已成功应用于GaN P-HEMT建模。在0.5至20.5 GHz的频率范围内，实测S参数和建模S参数之间具有极好的一致性。