This article describes the first public implementation and evaluation of the latest version of the RISC-V hypervisor extension (H-extension v0.6.1) specification in a Rocket chip core. To perform a meaningful evaluation for modern multi-core embedded and mixedcriticality systems, we have ported Bao, an open-source static partitioning hypervisor, to RISC-V. We have also extended the RISC-V platformlevel interrupt controller (PLIC) to enable direct guest interrupt injection with low and deterministic latency and we have enhanced the timer infrastructure to avoid trap and emulation overheads. Experiments were carried out in FireSim, a cycle-accurate, FPGA-accelerated simulator, and the system was also successfully deployed and tested in a Zynq UltraScale+ MPSoC ZCU104. Our hardware implementation was opensourced and is currently in use by the RISC-V community towards the ratification of the H-extension specification.

中文翻译：

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从嵌入式系统角度看RISC-V虚拟化

本文介绍了Rocket芯片内核中RISC-V虚拟机管理程序扩展（H-extension v0.6.1）规范的最新版本的首次公开实施和评估。为了对现代多核嵌入式和混合关键性系统进行有意义的评估，我们将开源静态分区管理程序Bao移植到RISC-V。我们还扩展了RISC-V平台级中断控制器（PLIC），以实现具有低确定性延迟的直接来宾中断注入，并且我们增强了计时器基础结构以避免陷阱和仿真开销。实验是在FireSim中进行的，FireSim是周期精确的，FPGA加速的模拟器，该系统也已在Zynq UltraScale + MPSoC ZCU104中成功部署和测试。