Due to various kind of Band-To-Band Tunneling (BTBT) operation, Heterojunction Tunnel Field Effect Transistors (HEFETs) are widely used in ultralow power applications. Anyhow, circuit complexity is a major issue in case of HEFET based memory development because of their uncomfortable size. Device scaling is a better way to eliminate such kind of issues for HEFET based memory development. Thus, development of Gate-oxide Overlapped Source-HEFET (GOS-HEFET) with lower Subthreshold Swing (SS) based Silicon on Insulator (SOI) is proposed to achieve perfect scaling in this work. Tunneling operation is done with the help of Si-based tunnel devices which are considerably lower than that of MOSFETs. Tunneling rate is enhanced by small bandgap material (Germanium (Ge)) in the source (S) while the ambipolar leakage is minimized by wide band gap material (Silicon (Si)) in the channel. Here, Ge is mainly utilized to dope the source region of P type transistor while Si is used to dope the drain (D) region of N type transistor. Moreover, the tunneling rate of BTBT is enhanced by the geometric alignment of the P and N type transistors with the gate oxide/semiconductor interface. Based on this procedure, five different kinds of SRAM (6 T, 7 T, 8 T, 9 T and 10 T) memory cells are designed. The proposed GOS-HEFET with lower SS on SOI design is implemented using SILVACO TCAD and TANNER CMOS technology. Then, power performance for different temperatures of the proposed method is compared with conventional HEFET based SRAM memory cells.

由于各种类型的带间隧道（BTBT）操作，异质结隧道场效应晶体管（HEFET）广泛用于超低功耗应用中。无论如何，在基于HEFET的存储器开发的情况下，电路复杂度是主要问题，因为它们的尺寸不舒适。器件缩放是消除基于HEFET的存储器开发中此类问题的更好方法。因此，提出了开发具有较低亚阈值摆幅（SS）的绝缘体上硅（SOI）的栅氧化物重叠源HEFET（GOS-HEFET）的方法，以在这项工作中实现完美的缩放比例。隧道操作借助硅基隧道器件完成，该器件远低于MOSFET。源极（S）中的小带隙材料（锗（Ge））可以提高隧穿速率，而通道中的宽带隙材料（硅（Si））则可以使双极泄漏最小化。在此，Ge主要用于掺杂P型晶体管的源极区域，而Si用于掺杂N型晶体管的漏极（D）区域。此外，通过P型和N型晶体管与栅极氧化物/半导体界面的几何对准，可以提高BTBT的隧穿速率。基于此过程，设计了五种不同类型的SRAM（6 T，7 T，8 T，9 T和10 T）存储单元。拟议的具有较低SS的SOS设计的GOS-HEFET是使用SILVACO TCAD和TANNER CMOS技术实现的。然后，将所提出的方法在不同温度下的功率性能与传统的基于HEFET的SRAM存储单元进行比较。