In this paper, a 256-stage pulse-based time delay integration (TDI) CMOS image sensor is presented. In this sensor, a capacitive trans-impedance amplifier (CTIA) based pipeline charge transfer (PCT) pixel structure is proposed, which achieves low noise signal accumulation. A pulse generator circuit is used after the PCT-pixel to detect and generate pulse, which starts processing self-reset operations when the pulse is generated. Therefore, 1-bit output is realized for each stage of TDI signal processing circuit. The pulse signal is easier to accumulate in the digital accumulator. With a high line rate of 100 KHz, SNR improvement of the proposed sensor is 24.15 dB and the energy consumption of the sensor is 0.44 nJ/pixel.

本文提出了一种基于256级脉冲的时延积分（TDI）CMOS图像传感器。在这种传感器中，提出了一种基于电容跨阻放大器（CTIA）的流水线电荷转移（PCT）像素结构，该结构可实现低噪声信号累积。在PCT像素之后使用脉冲发生器电路检测并产生脉冲，当产生脉冲时，该电路开始处理自复位操作。因此，对于TDI信号处理电路的每一级都实现了1位输出。脉冲信号更容易在数字累加器中累加。在100 KHz的高线路速率下，建议的传感器的SNR改善为24.15 dB，传感器的能耗为0.44 nJ /像素。