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Integration of GaN analog building blocks on p-GaN wafers for GaN ICs
Journal of Semiconductors Pub Date : 2021-02-26 , DOI: 10.1088/1674-4926/42/2/024103
Xiangdong Li 1, 2 , Karen Geens 1 , Nooshin Amirifar 1 , Ming Zhao 1 , Shuzhen You 1 , Niels Posthuma 1 , Hu Liang 1 , Guido Groeseneken 1, 2 , Stefaan Decoutere 1
Affiliation  

We demonstrate the key module of comparators in GaN ICs, based on resistor-transistor logic (RTL) on E-mode wafers in this work. The fundamental inverters in the comparator consist of a p-GaN gate HEMT and a 2DEG resistor as the load. The function of the RTL comparators is finally verified by a undervoltage lockout (UVLO) circuit. The compatibility of this circuit with the current p-GaN technology paves the way for integrating logic ICs together with the power devices.



中文翻译:

在用于 GaN IC 的 p-GaN 晶圆上集成 GaN 模拟构建块

我们演示了 GaN IC 中比较器的关键模块,该模块基于 E 模式晶圆上的电阻晶体管逻辑 (RTL)。比较器中的基本反相器由一个 p-GaN 栅极 HEMT 和一个作为负载的 2DEG 电阻器组成。RTL 比较器的功能最终通过欠压锁定 (UVLO) 电路进行验证。该电路与当前 p-GaN 技术的兼容性为将逻辑 IC 与功率器件集成在一起铺平了道路。

更新日期:2021-02-26
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