In this article, a low power, area-efficient full adder cell designed with approximate outputs is presented. The static Complementary Metal Oxide Semiconductor (CMOS) structure is applied to design this approximate full adder energy efficient (up to 72% improvement). The proposed cell simulated in HSPICE with 32nm CMOS technology in four different scenarios. First, the proposed cell was assessed as a 1-bit full adder cell; second, the proposed cell applied in a 4-bit carry ripple adder structure. In the third and fourth scenarios, the proposed cell's power consumption and performance were assessed in different power supply voltages, temperatures, and a larger load capacitor. Approximate computing is a design paradigm that is applicable in image processing as an error-resilient application. MATLAB exploited to assess the proposed approximate full adder in image addition application in three different scenarios. The outputs evaluated by different image quality metrics (such as peak signal to noise ratio (PSNR)) and the final outputs of approximation are acceptable in this application due to image quality metrics.

在本文中，提出了一种具有近似输出的低功耗，面积效率低的全加法器单元。静态互补金属氧化物半导体（CMOS）结构用于设计这种近似全加法器的能量效率（提高高达72％）。所建议的单元在HSPICE中采用32nm CMOS技术在四种不同情况下进行了仿真。首先，将建议的单元评估为1位全加器单元；第二，建议的单元应用于4位进位纹波加法器结构。在第三和第四种情况下，在不同的电源电压，温度和更大的负载电容器下评估了拟议电池的功耗和性能。近似计算是一种设计范例，可作为具有防错功能的应用程序应用于图像处理。MATLAB用来评估在三种不同情况下图像添加应用中建议的近似全加器。通过不同的图像质量指标（例如峰值信噪比（PSNR））和近似的最终输出是在本申请中可以接受由于图像质量度量。