The estimation of classical CMOS "constant-field" or "Dennard" scaling methods that define scaling factors for various dimensional and electrical parameters have become less accurate in the deep-submicron regime, which drives the need for better estimation approaches especially in the educational and research domains. We present DeepScaleTool, a tool for the accurate estimation of deep-submicron technology scaling by modeling and curve fitting published data by a leading commercial fabrication company for silicon fabrication technology generations from 130~nm to 7~nm for the key parameters of area, delay, and energy. Compared to 10~nm--7~nm scaling data published by a leading foundry, the DeepScaleTool achieves an error of 1.7% in area, 2.5% in delay, and 5% in power. This compares favorably with another leading academic estimation method that achieves an error of 24% in area, 9.1% in delay, and 24.9% in power.

中文翻译：

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DeepScaleTool：精确估算深亚微米时代技术规模的工具

在深亚微米状态下，定义各种尺寸和电参数缩放因子的经典CMOS“恒定场”或“ Dennard”缩放方法的估计变得不那么精确，这驱使人们需要更好的估计方法，尤其是在教育和科研领域。研究领域。我们提供DeepScaleTool，该工具可通过对领先的商业制造公司的芯片制造技术进行建模和曲线拟合，从而准确估算深亚微米技术规模，该芯片可用于从130〜nm到7〜nm的硅制造技术领域的关键技术参数，包括面积，延迟和能量。与领先的代工厂发布的10〜nm--7〜nm缩放数据相比，DeepScaleTool的面积误差为1.7％，延迟为2.5％，功耗为5％。