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Design and concept proof of an inductive impulse self-destructor in sense-and-react countermeasure against physical attacks
Japanese Journal of Applied Physics ( IF 1.5 ) Pub Date : 2021-02-11 , DOI: 10.35848/1347-4065/abdf1f
Sho Tada 1 , Yuki Yamashita 2 , Kohei Matsuda 2 , Makoto Nagata 1 , Kazuo Sakiyama 3 , Noriyuki Miura 4
Affiliation  

This paper presents an inductive impulse self-destruction circuit utilized in a sense-and-react IC-level countermeasure against physical attacks on a cryptographic processor. Triggered upon an alarm signal assertion by an integrated attack sensor, the proposed circuit instantaneously generates >10V high-voltage impulse to permanently destruct the cryptographic processor for enhancing tamper resiliency. A compact design with only a single on-chip inductor and a transistor significantly saves the hardware overhead. The inductor accumulates large electric energy in its magnetic field and the switch transistor suddenly opens the accumulated energy to boost the impulse voltage in an inertial manner. Since the inductor is drawn over the cryptographic core by existing on-chip IC interconnections, no extra area for the inductor and no any optional IC process steps are needed. This fully standard CMOS compatible, complete circuit solution, results in no fabrication cost penalty. A prototype implemented in both discrete components and a 0.18μm standard CMOS process successfully demonstrated the-proof-of-concept.



中文翻译:

感性反应对物理攻击的感应式脉冲自毁函数的设计和概念证明

本文提出了一种感应式脉冲自毁电路,用于感应和反应的IC级对策,以应对密码处理器上的物理攻击。由集成攻击传感器发出警报信号触发后,所提出的电路立即产生大于10V的高压脉冲,以永久破坏加密处理器,从而增强篡改能力。仅有一个片上电感器和一个晶体管的紧凑型设计极大地节省了硬件开销。电感器在其磁场中积累大量电能,而开关晶体管突然打开积累的能量,以惯性方式提升脉冲电压。由于电感器是通过现有的片上IC互连拉到加密核心上的,电感器不需要额外的面积,也不需要任何可选的IC工艺步骤。这种完全兼容CMOS的标准完整电路解决方案不会造成制造成本的损失。在分立组件和0.18中实现的原型μ M标准CMOS工艺成功地展示了防爆的概念。

更新日期:2021-02-11
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