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A Case for Speculative Strength Reduction
IEEE Computer Architecture Letters ( IF 2.3 ) Pub Date : 2021-01-01 , DOI: 10.1109/lca.2020.3048694
Arthur Perais

Most high performance general purpose processors leverage register renaming to implement optimizations such as move elimination or zero-idiom elimination. Those optimizations can be seen as forms of strength reduction whereby a faster but semantically equivalent operation is substituted to a slower operation. In this letter, we argue that other reductions can be performed dynamically if input values of instructions are known in time, i.e., prior to renaming. We study the potential for leveraging Value Prediction to achieve that goal and show that in SPEC2k17, an average of 3.3 percent (up to 6.8 percent) of the dynamic instructions could dynamically be strength reduced. Our experiments suggest that a state-of-the-art value predictor allows to capture 59.7 percent of that potential on average (up to 99.6 percent).

中文翻译:

降低投机强度的案例

大多数高性能通用处理器利用寄存器重命名来实现优化,例如移动消除或零成语消除。这些优化可以看作是强度降低的形式,其中,将较快但在语义上等效的操作替换为较慢的操作。在这封信中,我们认为,如果及时(即在重命名之前)知道了指令的输入值,则可以动态执行其他减少操作。我们研究了利用价值预测来实现该目标的潜力,并表明在SPEC2k17中,平均动态减少3.3%(最多6.8%)的动态指令。我们的实验表明,最先进的价值预测器可以平均捕获59.7%的潜力(高达99.6%)。
更新日期:2021-02-12
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